A record quarter that beat its own ceiling
TSMC did not just beat expectations on 16 July, it beat the ceiling it had set for itself. At the company's second quarter earnings conference in Taipei, Wendell Huang, senior vice president and chief financial officer, reported revenue of NT$1,270.38 billion, or US$40.20 billion, roughly 34 billion euros at mid-July rates. That is up 36.0% on the same quarter last year and 12.0% on the first quarter. Net income reached NT$706.56 billion and diluted earnings came to NT$27.25 per share, or US$4.31 per ADR.
The margins are where the quarter stops being ordinary. Gross margin landed at 67.7%, above the 65.5% to 67.5% range TSMC had guided. Operating margin came in at 60.3%, a full 1.8 points above the top of its own 56.5% to 58.5% guidance. Net profit margin was 55.6%. A company does not overshoot the upper bound of its own forecast by accident, and it does not do it on volume alone.
Huang tied the quarter to a single driver and pointed at what comes next. "Our business in the second quarter was supported by strong demand for our leading-edge process technologies," he said. "Moving into third quarter 2026, we expect our business to be supported by continued strong demand for our leading-edge process technologies, including the steep ramp-up of our 2-nanometer technology." That last clause is the part worth reading twice.
Selling more and earning more are different things
Revenue rose 36.0%. Net income rose 77.4%. That gap is the story. Profit grew at more than twice the rate of sales, and no amount of extra wafer volume explains a spread that wide. Volume growth shows up roughly one-for-one in revenue. When earnings outrun revenue by a factor of two, the extra is coming from price and mix, which is to say from what TSMC charges and from which nodes customers are forced onto.
The node breakdown shows where the leverage sits. Advanced technologies, defined as 7-nanometer and more advanced, made up 77% of second quarter wafer revenue. The 5-nanometer node contributed 33%, 3-nanometer 30%, 7-nanometer 11% and the new 2-nanometer node 3%. Those leading-edge lines are exactly the ones with no credible alternative supplier. Samsung and Intel are contesting the frontier, but nobody designing a high-end accelerator or flagship processor today is switching foundry on short notice.
This is what a monopoly on the frontier looks like on an income statement. Earlier this month the industry absorbed wafer price increases across every advanced node. TSMC's second quarter is the receipt for those increases, and it confirms something owners should note carefully: the cost went up, customers paid, and demand did not blink. A supplier that learns its price rises do not cost it volume has learned the most expensive lesson possible for everyone downstream.
Two nanometers is 3 percent of the bill, for now
The most forward-looking number in the release is the smallest one. The 2-nanometer node accounted for just 3% of second quarter revenue. It is brand new, barely ramped, and already TSMC is guiding third quarter revenue to US$44.6 billion to US$45.8 billion, implying another 11% to 14% of sequential growth on top of a record quarter.
Notice what the guidance does to margin. TSMC guides third quarter gross margin to 65% to 67%, down from the 67.7% it just delivered, and operating margin to 56% to 58%, down from 60.3%. The company is telling you plainly that ramping 2-nanometer capacity costs money before it makes money. Huang called it a steep ramp-up, and steep ramps compress margins on the way up.
Here is the part no source headline will say out loud. TSMC has a long record of absorbing ramp dilution and then recovering it, and the mechanism it uses is price. If a node that is 3% of revenue is already dragging guided margin down by roughly two points, the arithmetic of getting that margin back as 2-nanometer scales toward a third of the mix points in one direction. The chip cost increases that have moved through hardware budgets over the past year are not the end of the cycle. They are the opening of it.
What this means before your next refresh
Stop modelling chip inflation as a spike that passes. The reflex in most procurement plans is to delay a refresh by two quarters and wait for prices to normalise. TSMC's numbers say normalisation is not queued. Its customers, meaning the firms that build the servers, laptops, phones and industrial hardware you buy, are paying more per wafer into a supplier earning 60 cents of operating profit on the dollar, and those costs arrive in your quotes with a lag of two to four quarters.
Three moves are worth making now. Price your 2027 hardware refresh with chip-linked costs rising rather than flat, because a flat assumption is now the aggressive one. Where a vendor will hold pricing across a multi-year term, that certainty is worth paying a premium for. And where hardware is merely adequate rather than failing, extending the refresh cycle buys real budget, provided you have priced the security-support end date rather than the purchase date.
The honest caveat is that TSMC does not sell to you. It sells to Apple, Nvidia, AMD, Qualcomm and their peers, and every one of them decides how much of the increase to absorb and how much to pass on. Competitive consumer categories absorb more. Data-centre and specialist industrial hardware, where buyers have fewer options, pass on more. That is why the same foundry margin lands differently on a phone contract than on a server order, and why the server order is where the budget breaks first.
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